Frank
e22631d892
Runtime: ciru-ai/Qwen3.8-Flash-CIRU-STRIX-IU4 llama.cpp at tag v1.1, built with the vendor build-linux-amd.sh flag set plus GGML_CUDA_FA + GGML_CUDA_FA_ALL_QUANTS (the Q4_1_MOE_FORCE_J path is live in the hipified mmq kernels). Model: jcbtc/Qwen3.8-Flash-CIRU-STRIX-IU4 (Q4_1 IU4 experts, MTP Q8_0 draft, CIRUPLE1 PLE sidecar) with checksums verified at download. Vendor production profile verbatim on first deployment: 262144 ctx x 1 slot, b 2048 / ub 512, t 8 / tb 8, f16 KV, fa on, cont-batching, prompt cache + 8 GiB cache-ram + idle slots, 32 ctx checkpoints (min step 8192), MTP depth 3 with p-split 0.10, PLE pager env knobs (Q41_MOE_FORCE_J=32, PLE_WORKERS=16, PLE_STRICT_SHA=0, HIPBLASLT=1). Qwen-Sharp chat template kept deliberately; reasoning stays in DeepSeek format.
119 lines
5.0 KiB
Bash
119 lines
5.0 KiB
Bash
# Tunables for frank-default-large (jcbtc/Qwen3.8-Flash-CIRU-STRIX-IU4 on
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# the ciru-ai Qwen3.8-Flash-CIRU-STRIX-IU4 llama.cpp runtime, tag v1.1,
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# Dankclaw, Strix Halo gfx1151 unified memory).
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#
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# Runtime: full llama.cpp fork at
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# /home/dank/GitPackages/ciru-Qwen3.8-Flash-CIRU-STRIX-IU4/build-gfx1151,
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# built with the vendor build-linux-amd.sh flag set (HIP on, HIP_NO_VMM on,
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# HIP_GRAPHS on, HIP_MMQ_MFMA on, CUDA/VULKAN/SYCL off, gfx1151) plus
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# GGML_CUDA_FA + GGML_CUDA_FA_ALL_QUANTS. The IU4 WMMA expert path and the
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# CIRUPLE1 PLE pager read the GGML_* env knobs exported by the serve script.
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# Replaced the kingjones STRIX_LEAN (ROCmFPX build-qwen38) deployment.
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#
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# Model: Qwen3.8-Flash-Next base (56B MoE, 512 experts / 10 used, 48 layers
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# = 12 attention + 36 SSM, QSA indexer, hyper-connections, PLE at layer 1)
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# in the CIRU quality-first mixed quant: 144 routed-expert tensors at Q4_1
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# on the native IU4 WMMA path, protected tensors at Q5_K/Q5_1/Q8_0/BF16/F32.
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# Main GGUF ~79 GB + MTP Q8_0 draft ~4 GB + exact-FP8 PLE sidecar ~52 GB
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# paged from disk (never in VRAM; 4 GiB decoded-page cache via
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# --ple-cache-mib). Vendor-validated on the same silicon (gfx1151).
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#
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# The vendor production profile is applied verbatim on this first deployment:
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# -ngl all, -sm none, --fit off, ctx 262144 x 1 slot, b 2048 / ub 512,
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# t 8 / tb 8, f16 KV, fa on, cont-batching, prompt cache + 8 GiB cache-ram
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# + idle-slot cache, 32 ctx checkpoints with min step 8192, MTP depth 3
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# with p-split 0.10, GGML_CUDA_Q41_MOE_FORCE_J=32,
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# GGML_QWEN4EXP_PLE_WORKERS=16, GGML_QWEN4EXP_PLE_STRICT_SHA=0 (checksums
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# were verified with sha256sum -c at download time), ROCBLAS_USE_HIPBLASLT=1.
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# The Qwen-Sharp chat template is kept on purpose (chat-template.jinja): the
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# service keeps emitting reasoning in DeepSeek format for its clients.
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#
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# WARNING: do not name any variable TEMP, HOST, or GPU_MAX_HEAP_SIZE. The
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# ROCm HIP runtime reads those bare env vars (see the 2026-08-13 TEMP
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# incident). llama.cpp reads --host/--port/--temp as CLI flags, never as
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# env vars.
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# CIRU v1.1 runtime binary (vendor build script, plus FA_ALL_QUANTS).
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LLAMA_BIN=/home/dank/GitPackages/ciru-Qwen3.8-Flash-CIRU-STRIX-IU4/build-gfx1151/bin/llama-server
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# Model package from https://huggingface.co/jcbtc/Qwen3.8-Flash-CIRU-STRIX-IU4
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# Layout: main GGUF + mtp/ Q8_0 draft + ple/ CIRUPLE1 sidecar (mandatory).
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MODEL_DIR=/home/dank/models/ciru-Qwen3.8-Flash-CIRU-STRIX-IU4
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MODEL_FILE=Qwen3.8-Flash-CIRU-STRIX-IU4.gguf
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# Qwen-Sharp chat template (tracked in the repo, staged on the host). The
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# Sharp template drives thinking on by default (medium effort); the server
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# emits reasoning in DeepSeek format so clients receive reasoning_content
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# separately instead of literal thinking tags in content.
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CHAT_TEMPLATE_FILE=/home/dank/serverAppConfigs/scripts/chat-template.jinja
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CHAT_TEMPLATE_KWARGS='{"enable_thinking":true,"preserve_thinking":true,"preserve_reasoning":true}'
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# Alias + network.
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ALIAS=frank-default-large
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BIND_ADDR=0.0.0.0
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LISTEN_PORT=7770
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# Vendor production profile, verbatim: 262144-token context on ONE slot
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# (parallel 1), batch 2048 / ubatch 512, 8+8 threads, f16 KV, 32 context
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# checkpoints with min step 8192, 8 GiB prompt cache, 4 GiB PLE page cache.
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# --fit off: auto-fit segfaults on this model's hyper-connection/indexer
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# config; -ngl all puts every layer on the SVM-backed GPU pool.
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CTX_SIZE=262144
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PARALLEL=1
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BATCH_SIZE=2048
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UBATCH_SIZE=512
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NUM_THREADS=8
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THREAD_BATCH=8
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CACHE_TYPE_K=f16
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CACHE_TYPE_V=f16
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CTX_CHECKPOINTS=32
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CHECKPOINT_MIN_STEP=8192
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CACHE_RAM=8192
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PLE_CACHE_MIB=4096
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SLOT_SAVE_PATH=/home/dank/serverAppConfigs/scripts/slot-state
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SPLIT_MODE=none
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FIT=off
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# Sampling (Sharp default; vendor API examples agree for non-thinking mode).
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TEMPERATURE=0.7
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TOP_K=20
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TOP_P=0.8
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MIN_P=0.0
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PRESENCE_PENALTY=1.5
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# Reasoning on (Sharp template drives it; preserve_thinking + preserve_reasoning
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# keep the reasoning trail in the conversation). DeepSeek format projects the
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# reasoning into the API's reasoning_content field instead of literal thinking
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# tags.
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REASONING=on
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REASONING_FORMAT=deepseek
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# Strix Halo unified memory + native gfx1151.
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HSA_OVERRIDE_GFX_VERSION=11.5.1
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VERBOSITY=4
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# Speculative decoding: MTP draft head (Q8_0) at depth 3, p-split 0.10 —
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# the vendor headline profile. ngram-mod stacking is a later experiment;
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# SPEC_TYPE=none disables spec decoding entirely.
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DRAFT_MODEL_DIR=/home/dank/models/ciru-Qwen3.8-Flash-CIRU-STRIX-IU4/mtp
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DRAFT_MODEL_FILE=Qwen3.8-Flash-CIRU-STRIX-IU4-MTP-Q8_0.gguf
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SPEC_TYPE=draft-mtp
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SPEC_DRAFT_N_MAX=3
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SPEC_DRAFT_N_MIN=0
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SPEC_DRAFT_P_MIN=0.0
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SPEC_DRAFT_P_SPLIT=0.10
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SPEC_DRAFT_NGL=all
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SPEC_DRAFT_DEVICE=ROCm0
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SPEC_DRAFT_TYPE_K=q8_0
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SPEC_DRAFT_TYPE_V=q8_0
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# Vendor runtime env knobs (read by the hipified mmq + PLE pager kernels).
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# GGML_CUDA_Q41_MOE_FORCE_J forces the Q4_1 MoE WMMA tile width; the PLE
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# pager knobs control the CIRUPLE1 page-in workers and skip re-hashing the
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# 52 GB payload at every launch (checksums were verified once, at download).
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GGML_CUDA_Q41_MOE_FORCE_J=32
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GGML_QWEN4EXP_PLE_WORKERS=16
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GGML_QWEN4EXP_PLE_STRICT_SHA=0
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ROCBLAS_USE_HIPBLASLT=1
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