Empirically verified on 2026-08-13 (caches dropped): batch 8192 / ubatch 2048 loads and serves at ctx 602100 with 61 GiB VRAM peak. The benchmark doc's 'ubatch 2048 OOMs' results were confounded by page-cache pressure - with the model's pages fully cached the KV/graph allocation stalls at 28 GiB VRAM. Drop caches (sync; echo 3 > /proc/sys/vm/drop_caches) before starting a load to make restarts reliable.
49 lines
2.1 KiB
Bash
49 lines
2.1 KiB
Bash
# Tunables for frank-default-large (HauhauCS Qwen3.6-27B Q8_K_P, DFlash+ngram-mod, dankclaw)
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# Runtime: llama.cpp llama-server; AMD Strix Halo (gfx1151) 96GB UMA; Ryzen AI MAX+ 395.
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MODEL_DIR=/home/dank/models
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ALIAS=frank-default-large
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HOST=0.0.0.0
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PORT=7770
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# 3 parallel slots x 200700 ctx each = 602100 total context pool.
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CTX_SIZE=602100
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PARALLEL=3
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# Spec: DFlash draft model. Bench (4k, ROCm) showed draft-dflash fastest
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# generation (20.2 t/s): DFlash+ngram 16.9, ngram-only 8.7. ngram layering
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# reduced throughput, so it is not layered in production.
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SPEC_TYPE=draft-dflash
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SPEC_DRAFT_N_MAX=8
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SPEC_NGRAM_MOD_N_MIN=48
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SPEC_NGRAM_MOD_N_MAX=64
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SPEC_NGRAM_MOD_N_MATCH=24
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# Backend device from --list-devices. ROCm wins on generation; Vulkan renders
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# DFlash spec unusable (NONE-op abort) and gen is slower on ngram (6.9 t/s).
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DEVICE=ROCm0
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# Dense model (Qwen3.6-27B, not MoE): no MoE CPU offload. Full offload.
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N_GPU_LAYERS=all
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# KV on GPU, quantized (K q8_0, V q8_0). V MUST match K: this llama.cpp
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# build has GGML_CUDA_FA_ALL_QUANTS=OFF, and Flash Attention requires
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# K type == V type. Mixed q8_0/f16 silently disables FA, collapsing
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# long-context decode to ~1 t/s at 200k ctx. q8_0 V halves V memory too.
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CACHE_TYPE_K=q8_0
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CACHE_TYPE_V=q8_0
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# Batch sizing: empirically verified 2026-08-13 with caches dropped.
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# batch 8192 / ubatch 2048 loads and serves (61 GiB VRAM peak, ctx 602100).
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# The earlier "ubatch 2048 OOMs" notes in frank-default-large-benchmark.md
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# were confounded by page-cache pressure: with the model's pages fully
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# cached, the KV/graph allocation stalls (VRAM stuck at 28 GiB).
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# Drop caches before starting a load: sync && echo 3 > /proc/sys/vm/drop_caches.
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BATCH_SIZE=8192
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UBATCH_SIZE=2048
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# Sampling settings — per HauhauCS Qwen3.6-27B model card.
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# Thinking-general: temp=1.0, top_p=0.95, top_k=20, min_p=0.
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# Clients may override per-request; these are the server-side defaults.
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# WARNING: do not name this variable TEMP. The ROCm HIP runtime reads the
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# TEMP environment variable (JIT kernel-cache dir); TEMP=1.0 made the HIP
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# runtime SEGV (NULL unref) during model load on Aug 13 2026.
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TEMPERATURE=1.0
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TOP_K=20
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TOP_P=0.95
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MIN_P=0.0
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THREADS=12
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THREADS_HTTP=1
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