Frank
903d54c389
Update target maps (AGENTS, README, deployment, deploy.sh) from the retired ROCmFPX llama.cpp stack to the active vLLM-ROCm CIRU INT4 service on port 7770 with MTP speculative decoding. Align Dankserver to the running vllm-awq-qwen36 (AWQ, port 34401). Refresh KB pages: Dankclaw system specs (gpu-mem-util 0.95, CIRU venv), quantization choices (INT4 primary, MXFP4 experiment), DFlash/DSpark Dankclaw section, and the KB index topology.
132 lines
4.7 KiB
Markdown
132 lines
4.7 KiB
Markdown
# Quantization by Hardware Architecture
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## Overview
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This page maps LLM quantization formats to the GPU and CPU architectures that support them. It answers one question: which quantization type works well on a given piece of hardware?
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Use this page when you choose a model format for Dankserver or Dankclaw. The short answer:
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- NVIDIA Ampere (RTX 30 series): AWQ or GPTQ 4-bit.
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- NVIDIA Ada (RTX 40 series): FP8 or AWQ.
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- NVIDIA Hopper / Blackwell (H100, RTX 50 series): FP8, NVFP4.
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- AMD CDNA (MI300 series): FP8 or MXFP4.
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- AMD RDNA 3 / Strix Halo (gfx11): Quark INT4 (vLLM), GGUF Q4_K_M, or ROCmFP4.
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- CPU-only: any GGUF quant.
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## Quantization Types
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### FP8 (E4M3)
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FP8 uses 8 bits per weight. vLLM supports two modes: W8A8 (quantize weights and activations) and W8A16 (weights only).
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| Hardware | Native support | Notes |
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|----------|----------------|-------|
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| NVIDIA Hopper (SM 9.0) | yes | full FP8 tensor cores |
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| NVIDIA Ada (SM 8.9) | yes | full FP8 tensor cores |
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| NVIDIA Ampere (SM 8.0/8.6) | no | W8A16 via Marlin; W8A8 runs via fallback |
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| NVIDIA Turing (SM 7.5) | no | W8A16 via Marlin only |
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| NVIDIA Blackwell (SM 12.0) | yes | FP8 and native FP4 |
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| AMD MI300/MI350 (gfx942/gfx950) | yes | via ROCm AITER |
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| AMD MI250/MI325 | no | simulation: dequantize to FP16 |
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| AMD RDNA 3/3.5 (gfx11/gfx1151) | no | software emulation only |
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| CPU | no | FP8 models run via dequant |
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Rules:
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- Use FP8 on Ada, Hopper, Blackwell, or MI300+.
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- On Ampere (RTX 3090), FP8 gives memory savings only. Run AWQ or BF16 instead.
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- Do not expect compute speedup from FP8 on RDNA or on the RTX 3090.
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### INT8
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INT8 W8A8 is broadly supported.
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| Hardware | Native support |
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|----------|----------------|
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| NVIDIA Volta through Blackwell | yes |
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| AMD MI300/MI350 | yes |
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| AMD RDNA 3/3.5 | no |
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| x86 CPU | yes, via llama.cpp or llm-compressor |
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### INT4 (AWQ, GPTQ)
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INT4 is the standard choice for 24 GB GPUs such as the RTX 3090.
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| Hardware | AWQ | GPTQ |
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|----------|-----|------|
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| NVIDIA Turing | yes | yes |
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| NVIDIA Ampere | yes | yes |
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| NVIDIA Ada / Hopper / Blackwell | yes | yes |
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| AMD ROCm (vLLM) | no | no |
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| AMD ROCm (Quark) | yes | yes |
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| AMD ROCm GGUF | yes | yes |
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Rules:
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- AWQ is the default choice for NVIDIA with vLLM.
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- On AMD, use GGUF INT4 or the AMD Quark toolkit. vLLM does not list AWQ or GPTQ in its native ROCm matrix.
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### GGUF (Q4_0, Q5_K_M, Q8_0, etc.)
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GGUF runs on CPU everywhere. GPU acceleration is available through CUDA, ROCm, SYCL, and Vulkan backends. This is the format llama.cpp uses.
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Good GGUF quant choices:
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| Use case | Quant |
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|----------|-------|
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| Quality first | Q8_0, Q6_K |
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| Balanced | Q5_K_M, Q4_K_M |
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| Small footprint | Q4_0, IQ4_XS |
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| Smallest | IQ2_XS, Q2_K |
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### FP4
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FP4 has two variants: NVFP4 (NVIDIA) and MXFP4 (OCP standard).
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| Hardware | NVFP4 | MXFP4 |
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|----------|-------|-------|
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| NVIDIA Blackwell | native | aligned |
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| NVIDIA Ada / Ampere | emulation | emulation |
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| AMD MI300X/MI355 | via ROCm | native |
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| AMD MI250/MI325 | simulation | simulation |
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| AMD RDNA 3 | emulation | aligned, beta |
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### ROCmFP4 (ROCmFPX fork)
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ROCmFP4 is a GGUF weight format from the ROCmFPX llama.cpp fork. It targets AMD hardware, especially Strix Halo (gfx1151). It is roughly 4.25 bpw and about 12% smaller than Q4_K_M. It uses HIP/ROCm and Vulkan kernels.
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Use ROCmFP4 only with the ROCmFPX fork of llama.cpp. Upstream llama.cpp cannot read these files.
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## Choices for This Project
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### Dankserver (RTX 3090, 24 GB, Ampere)
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The RTX 3090 has no native FP8 or FP4 tensor cores. Use:
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| Ranking | Format | Why |
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|---------|--------|-----|
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| 1 | AWQ 4-bit | best fit for 24 GB; native kernels |
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| 2 | GPTQ 4-bit | good alternative to AWQ |
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| 3 | BF16 + KV offload | quality reference; CPU-offload experts |
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| 4 | FP8 | only if the FP8 file is all you have; memory savings, no compute win |
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### Dankclaw (Strix Halo gfx1151, RDNA 3.5)
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RDNA 3.5 has no native FP8 tensor cores. The APU shares memory. The active Ling-3.0-flash service runs vLLM-ROCm with the AMD Quark INT4 (W4A16) format (the jcbtc CIRU Strix-native bundle). INT4 weights keep the 124B model inside the 96 GiB frame buffer with a full-precision KV cache.
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| Ranking | Format | Why |
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|---------|--------|-----|
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| 1 | INT4 W4A16 (Quark/vLLM) | active; fits 96 GiB; native ROCm kernels; concurrency |
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| 2 | MXFP4 (Quark) | same-bit, higher accuracy; beta on gfx1151 (A/B experiment) |
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| 3 | GGUF Q4_K_M / Q8_0 | works with upstream llama.cpp only |
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| 4 | FP8 (vLLM) | software emulation; memory savings only; no compute win |
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## See Also
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- [[DFlash DSpark Speculative Decoding]]
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- [[Running Qwen3.6 35B A3B FP8 on Dankserver]]
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- [[Running Qwen3.6 27B FP8 on Dankclaw]]
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- [[Dankclaw System Specs]]
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- [[Dankserver System Specs]]
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- [[VLLM Overview]]
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- [[Shared Memory Architecture Dankclaw]] |