Frank
e133d2412d
Two conflicts, both from the 2026-10-19 vault compaction on main: * frontmatter description — main shortened it to satisfy OKF DESC (max 120 chars); this branch's longer wording would have failed the seam. Kept main's shape and folded the new §9 in by naming step-shape attribution instead of profiler attribution. * the Related bullet for [[vLLM Porting and Compile Triage]] — that page was destroyed on main, so the link is dropped rather than resurrected; this branch's [[frank-archon]] row is kept. Index rows regenerated with scripts/gen-vault-index.py.
50 lines
3.0 KiB
Markdown
50 lines
3.0 KiB
Markdown
# LLM fleet — index
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The three live endpoint pages are the only pages that carry a shape. Everything
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else here is a technique or a piece of hardware, and each of those owns exactly
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that one thing. There is no worklog and no era page: a payload swap is one row in
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the endpoint's **Eras** table, and the numbers a retired era measured are gone.
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## Live endpoints
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| Page | Owns |
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| [[frank-archon]] | The radiance endpoint: live shape and harness contract, every era with its rollback path, and the laws it taught. |
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| [[frank-dragoon]] | The iGPU endpoint: live shape, every era with its rollback path, the laws it paid for, and the files that own it. |
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| [[frank-zealot]] | The RTX 3090 endpoint: live shape exactly as the env ships it, every era with its rollback path, and its card laws. |
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## Retired endpoints
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| Page | Owns |
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## Pipeline Parallelism (series)
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| Page | Owns |
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## Techniques, hardware, trials
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| Page | Owns |
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| [[Dankclaw Improvements]] | This page collects concrete, sourced recommendations to improve Dankclaw |
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| [[Dankclaw System Specs]] | Dankclaw is an AMD APU server for CIRU ROCmFPX llama.cpp inference. |
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| [[dankclaw-iommu-translation-off]] | Why Dankclaw boots with identity DMA, what the earlier off-era bought and cost, and which tooling owns the boot line. |
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| [[Dankserver System Specs]] | Dankserver hardware and OS state since the board swap: board, lane topology, cards, memory, kernel posture. |
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| [[DFlash DSpark Speculative Decoding]] | DFlash and DSpark are the two newest speculative decoding methods. |
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| [[GGUF Compatibility]] | Answering whether an engine loads a GGUF from the file header alone, and pinning a fork build that can. |
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| [[Heterogeneous Split Triage]] | Triage before splitting across unequal accelerators: link characterisation, real bottleneck, what placement never buys. |
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| [[Llama Cpp Serving Sizing]] | Measurement-first sizing for llama.cpp shapes: slot pools against a headroom band, per-device accounting, prompt cache. |
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| [[LLM Performance Diagnosis]] | Probing why a served model is slow: the flat-depth probe, offload duty-cycle arithmetic, and step-shape attribution. |
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| [[Model Swap and Rollback]] | The model-swap discipline: fit preflight, fetch verification, build and flag checks, live validation, three-pin revert. |
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| [[PCIe Link and Atomics]] | Link probing, the streaming-versus-compute ceiling arithmetic, and the atomics wall that decides multi-GPU collectives. |
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| [[Quantization by Hardware Architecture]] | This page maps LLM quantization formats to the GPU and CPU architectures that support them. |
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| [[Quantization Production]] | Making a quantized payload here: the conversion recipe, the scoring gate, and the campaign ladder behind a shipped file. |
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| [[RDNA4 MoE Expert Offload VRAM Budget]] | Expert-offload arithmetic on the RDNA4 fork: movable terms, the utilisation law, graph charge, ceilings, context ladder. |
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| [[Shared Memory Architecture Dankclaw]] | Dankclaw uses AMD Strix Halo APU with unified memory architecture. |
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## Pages
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| Page | Owns |
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