docs(vault): halogen has an NPU lane on the pin we already run, and it is greedy-only
- frank-dragoon: measured the response_format contract. json_schema and json_object answer
schema-valid JSON at temperature 0 and draw a 400 at any sampled temperature, and because
the sampler default is server-side an absent temperature is sampled. The page claimed
"response_format is unsupported", which sends the next agent past a working feature.
- frank-dragoon: new "The NPU lane" section. The pinned 0.16.2 image already ships the
five-program AIE catalog including qwen3-embedding-0.6b, so /v1/embeddings is one env var
plus the accel device, the distro-XRT mount and the fabric-clock hold; embeddinggemma-2
needs 0.18.3+, the stock-kernel-driver memory-budget fix 0.18.8+. Host census recorded:
no /opt/xilinx/xrt, distro XRT 1:2.21.75 with libxrt_driver_xdna, clocks unheld.
- Open Notebook: scriptwriter probe verdict — greedy-only, and open-notebook's model record
is {credential, name, provider, type} with no per-row config, so it cannot ask for greedy;
frank-archon stays the writer. The embedding gap now has a named door instead of "build a
new llama.cpp slot".
- Frank TTS: "the NPU is not a door at all" was too broad. It is not a door for the TTS
family; halogen's precompiled catalog is a door on the same device.
- System Specs: NPU runtime row corrected to the distro XRT actually installed, and the
stale "frank-zealot serves 27B" line retired in favour of [[frank-zealot]] as sole owner.
Tests: ./tests/run.sh, 455 passed.
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@@ -121,10 +121,12 @@ touching either tenant, because a change to one is a change to both. Co-tenancy
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`frank-dragoon` live on the card (its first token and decode rates unchanged with a synthesis
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in flight); both gate recipes are §5 of `report/tts-npu-spike-verdict-2026-10-19.md`.
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**The Strix Halo NPU is not a door at all**: XDNA2 executes only precompiled AIE partition
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programs, and AMD's own Linux runtime opens `/dev/accel/accel0`, succeeds at the ioctls, then
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declines this model family's graph without emitting a single log line. The measured record and
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the model-side contract live in `report/` at the repo root
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**The NPU is a door only for a model the vendor has already compiled for it.** XDNA2 runs nothing but
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precompiled AIE partition programs, and AMD's own Linux runtime opens `/dev/accel/accel0`, succeeds at the
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ioctls, then declines this model family's graph without emitting a single log line. That is why TTS stays on
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the GPU — and it is not a general veto on the device: halogen ships its own precompiled catalog (embeddings,
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decisions, rerankers) that does run there, which is what [[frank-dragoon]]'s NPU-lane section is about. The
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measured record and the model-side contract live in `report/` at the repo root
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(`tts-npu-spike-verdict-2026-10-19.md`).
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## Files
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