docs(iommu): record the executed flip to iommu=pt and its measured cost of nothing

Window 01:24-01:35. Byte-identical A/B (rebuild proved it: same 1,287,656 B corpus,
same billed token counts 59,024 / 21,568): cold prefill 1,585.1 -> 1,616.0 t/s
(+2.0 %), warm 208,531 -> 214,131, needle hit/hit both boots. The 13-16 % that
justified amd_iommu=off since 2026-09-11 does not exist on this host; the decode
delta (-9.7 %) is instrument noise -- three repeats of one request on the same boot
gave 31.8/46.9/47.8 t/s.

NPU precondition restored: amdxdna bound 0000:c6:00.1 (driver 0.7.0, firmware
amdnpu/17f0_11/npu_7.sbin), group 26 identity, PASID width 10, /dev/accel/accel0
root:render with dank in render. No endpoint deployed, so frank-npu stays retired
-- only its rationale changes. Gates: 0 failed units, 32 groups (31 identity + the
SD reader's DMA quirk), iGPU c5:00.0 identity with ATS, dragoon ledger unchanged
(74.1 GiB, no clamp, listening at 39.8 s).

Deferred on purpose: the pp_dpm_fclk pin (changes iGPU timing for everyone, nothing
co-runs yet) and PerfOpt (7.0.0-38 has zero perfopt symbols, 26.04 caps at 7.0.0-38.38).
Re-keyed: decision record banner/front matter/verification/revert + new execution
section, frank-npu rationale, AGENTS key lesson, both index pages.

serverAppConfigs-docs/LLM/frank-npu.md

@@ -43,20 +43,25 @@ upstream project on this exact silicon. That single flag is the whole decision:
   That is precisely the failure the endpoint was rescued from on 2026-08-30,
   recorded in the next section.
 - `iommu=pt` was recorded here as "not a middle ground", on the theory that the
-  passthrough domain still costs the vendor's prefill number. **That claim did
-  not survive the 2026-10-18 research.** Identity mode is not free for the iGPU
-  — its DMA still walks 1:1 page tables and the AMD attach path enables
-  ATS/PRI/PASID/GCR3 for the device — but on this silicon class the cost is
-  single-digit percent, and **AMD PerfOpt** (Linux 7.4, merged 2026-09-24)
-  removes it: the IOMMU then enforces only the IR/IW permission bits for the
-  privileged iGPU and stays fully armed for every other device, the NPU
-  included. So `pt` IS the revival path for this endpoint. See
-  [[dankclaw-iommu-translation-off]] § *2026-10-18 research* for the kernel
-  census, the versions to avoid (6.18–6.18.7 disable SVA), the device-access
-  quadlet law (`AddDevice=/dev/accel/accel0` + `GroupAdd=keep-groups`), and the
-  measurement step that must precede any decision.
+  passthrough domain still costs the vendor's prefill number. **That claim is
+  dead: the host flipped to `iommu=pt` on 2026-10-18 and the local A/B on
+  byte-identical traffic measured the cost at nothing** (+2.0 % cold prefill,
+  1,616 t/s at 59k tokens). Identity mode does keep a 1:1 page walk plus
+  ATS/PRI/PASID/GCR3 armed for the iGPU — worth 2–4 % on this silicon class, and
+  **AMD PerfOpt** (Linux 7.4, merged 2026-09-24) removes it outright by enforcing
+  only the IR/IW permission bits for the privileged iGPU — but nothing waits on
+  that now.
+- **The precondition is satisfied; the endpoint is still not deployed.** `amdxdna`
+  binds `0000:c6:00.1` (driver 0.7.0, firmware `amdnpu/17f0_11/npu_7.sbin`), the
+  NPU sits in IOMMU group 26 `identity` with PASID width 10, `/dev/accel/accel0`
+  is `crw-rw---- root:render 261,0` and `dank` is in `render` — so a revival
+  quadlet needs `AddDevice=/dev/accel/accel0` + `GroupAdd=keep-groups`, the
+  ComfyUI `/dev/kfd` pattern. Kernel versions to avoid: **6.18–6.18.7** disables
+  SVA outright. Full census in [[dankclaw-iommu-translation-off]]
+  § *2026-10-18 execution*.
 - The operator took the vendor's prefill figure on the September evidence, so the
-  NPU endpoint went.
+  NPU endpoint went — and it stays retired because nobody has asked for a model
+  on it, not because the hardware is unreachable.
 
 Consequences accepted at retirement: **audio input left the fleet with no
 replacement** (halogen reads images only, no audio or video), and the surviving