frank-large: mmap the CPU-overridden weights (no CUDA_Host pinning)
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+27
-17
@@ -18,18 +18,26 @@
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# as 3 parts, concatenated on disk; each part's sha256 was verified against
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# its HF LFS oid at download time.
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#
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# Placement (ikawrakow's hybrid recipe, upstream issue #2402):
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# - --cpu-moe: ALL expert tensors (121B elems, ~71 GB) live in the Strix
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# Halo's LPDDR5X via the CPU path — ik's fastest known configuration
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# for this shape (the author's 2x3090 + Threadripper reference box
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# measures ~50 t/s on the same model family).
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# - -ngl 999: dense/attention/output weights and the KV cache on the
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# 3090 (~3 GB of weights + ~6 GB KV at 262k f16; 24 GB card).
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# - The ~35 GB PLE table (per_layer_token_embd) is intentionally
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# RAM/mmap-resident by design — only a tiny slice is touched per token.
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# NEVER add --no-mmap (the STRIX-era lesson transfers: the cgroup
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# killer takes the process with nothing in the server log) and do not
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# try to pin PLE to VRAM (it cannot fit a 24 GB card).
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# Placement (ikawrakow's hybrid recipe; upstream issue #2402 for the PLE):
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# - -ot "exps=CPU": ALL 512-expert tensors (121B elems, ~84 GB) live in
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# the Strix Halo's LPDDR5X via the plain CPU backend buffer — mmap-backed
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# page cache, ik's fastest known configuration for this shape (the
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# author's 2x3090 + Threadripper reference box measures ~50 t/s on the
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# same model family). The shared experts (shexp) keep their GPU-side
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# default: they run on every token.
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# - -ot "per_layer_token_embd=CPU": the ~32 GB PLE n-gram table follows —
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# only a tiny slice is touched per token, so it streams from page cache.
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# - NEVER use --cpu-moe on this host: it routes the CPU-overridden
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# weights through the CUDA_Host PINNED buffer (measured 2026-09-15:
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# 108.12 GiB page-locked, evicted every co-tenant into swap and starved
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# sshd into unreachability until a power cycle). -ot ...=CPU is the
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# mmap-backed path with identical DDR5 bandwidth for resident pages,
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# and the kernel degrades gracefully under pressure (page cache evict
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# + re-read) instead of stranding anyone.
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# - GGML_CUDA_NO_PINNED_WEIGHTS=1 (src/llama-load-tensors.cpp) keeps the
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# CPU-overridden weights mmapped and leaves only the small staging
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# buffers pinned. (GGML_CUDA_NO_PINNED would also unpin staging —
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# unnecessary here and slower for prefill transfers.)
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#
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# Sampling: greedy-by-default to preserve the halogen-era client contract
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# (a request without temperature decodes greedy; temp 0.0 = argmax).
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@@ -53,7 +61,7 @@ MMPROJ_PATH=/home/dank/models/mradermacher-Qwen3.8-Flash-Next-Uncensored-i1-Q4_K
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# Qwen-Sharp chat template (tracked in the repo, staged on the host). The
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# server emits reasoning in DeepSeek format so clients receive
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# reasoning_content separately instead of literal thinking tags in content.
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# reasoning_content separately instead of literal think tags in content.
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CHAT_TEMPLATE_FILE=/home/dank/serverAppConfigs/scripts/chat-template.jinja
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# Alias + network.
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@@ -75,11 +83,13 @@ THREAD_BATCH=16
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CACHE_TYPE_K=f16
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CACHE_TYPE_V=f16
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# GPU/MoE placement: everything on the 3090 except the experts, which all
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# live in host RAM (--cpu-moe). See the placement notes above.
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# GPU/MoE placement: everything on the 3090 except the experts and the PLE
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# table, which both live in host RAM via the CPU backend buffer (see the
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# placement notes above).
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NGL=999
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CPU_MOE=on
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FLASH_ATTN=on
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# ik_llama.cpp CUDA host-memory policy: CPU-overridden weights stay mmapped;
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# only the small staging buffers are pinned (see the placement notes above).
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GGML_CUDA_NO_PINNED_WEIGHTS=1
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# Prompt cache (RAM budget in MiB) and slot state dir.
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CACHE_RAM=8192
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